1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, it relates to an improvement in the structure of a bipolar transistor employed for an SRAM (static random access memory).
2. Description of the Prior Art
FIG. 68 is a circuit diagram of a conventional SRAM (static random access memory). Referring to FIG. 68, access transistors Q1 and Q2, driver transistors Q3 and Q4 and load resistances Q5 and Q6 form a prescribed flip-flop circuit.
The stability of a conventional SRAM memory cell is now described with reference to FIG. 69. The stability of the conventional SRAM memory cell is set to satisfy the following relation:
In general, a static noise margin is employed as an index indicating the stability of the SRAM memory cell. The SRAM memory cell can stably hold data in proportion to its static noise margin. The static noise margin, which increases in proportion to the .beta. ratio expressed as "current value of driver transistor/current value of access transistor", is generally set to be at least 3.
If a power supply voltage for the conventional SRAM memory cell reduces, however, the current value of its driver transistor reduces in excess of that of the access transistor to reduce the .beta. ratio even if the stability is attained as described above, since the threshold value V.sub.th of the driver transistor is higher than that of the access transistor. Consequently, the static noise margin disappears when the power supply voltage is 2.0 V, for example, to disable the SRAM memory cell for its operation.